搜索资源列表
ARM_core_VHDL
- 文件ARM_core_VHDL.rar 嵌入式arm核的vhdl语言描述.-document ARM_core_VHDL.rar Embedded arm of the nuclear vhdl language descr iption.
000000adada2
- 数据结构，二叉树和哈夫曼编码。C++ 1、 学会针对DFA转换图实现相应的高级语言源程序 ·a C++ Class Library of Cr ·简单的防火墙，可以用来学习，作为毕业课设也相当有帮 ·实现ARM 芯片的一对PWM 输出用于控制直流电机 ·Programming the Microsoft ·VC调用java的简单例子。需要注意jvm.dll ·这是介绍在VC++6。0下如何编写GPIB程序。有 ·GPS坐标转换软件：直角坐标与大
core_arm.tar
- vhdl的arm核 包含testbench
core_arm.tar
- 用VHDL语言实现的ARM处理器的标准内核的源代码程序，可在重用-use of the VHDL standard ARM processor core source code procedures, the reuse
ARM_ALU
- ARM ALU设计，包含相应的VHDL文件及设计所用到的Visio图。-ARM ALU design, the VHDL file that contains the appropriate use and design of the Visio diagram.
ARM_VHDL
- arm的vhdl代码，不用多说吧 ，晕啊 啊-armmamamamamamamamam
ARMCORE
- mcu arm ,easy study and understand,for arm energer,it s very good.
spi.tar
- This is a verilog code used oversampled clock to implement SPI slave. Also include C code for a ARM processor as the SPI master-This is a verilog code used oversampled clock to implement SPI slave
apb_bridge
- arm ambm 2.0 primecell算法 ahb 与 apb通讯的转换模块-arm ambm 2.0 primecell algorithm ahb conversion and communications module apb
BP062-BU-01000-r0p0-00rel0[1][1].tar
- AXI协议检查器，由ARM公司开发对于想开发AXI master和slave模型的ASIC设计人员非常有用！-AXI protocol checker, developed by ARM to develop for the AXI master and slave model is very useful ASIC designers!
uart
- 用ALTERA的芯片做的多串口代码，内部做了3个通用串口，适合51 ARM等CPU，有完整的ALTERA工程和仿真波形-uart FOR ALTERA
Vme_Interface
- 这是本人设计的一个关于VME总线接口的FGPA程序，FPGA一边连接ARM LPC2294，一边连接VME总线，FPGA采用的XILINX公司的SPARTANII系列，程序包包含完整的工程文件-This is my design of a VME bus interface on the FGPA procedures, FPGA side of the connection ARM LPC2294, while connecting VME bus, FPGA using the XILINX
nnARM_tb01_09_02
- arm processor verilog code
core_arm
- 从opencore找都的ARM的IP CORE。有详细说明。-From opencore to find all of the ARM' s IP CORE. Is described in detail.
ARM_Core
- ARM 7，有三级流水线，对于初学流水线芯片设计的学生来说，是个很好的教例！-ARM 7, there are three lines, chip design pipeline for beginner students, is a very good teaching cases!
ARM
- a source code for arm7 with manual and data path
ARM
- ARM32位寄存器的设计，针对于32位寄存器的用VHDL语言编写的代码-ARM32-bit register, designed for 32-bit registers in the language with code written in VHDL
VHDL-8bitFIFO
- FIFO的宽度：也就是英文资料里常看到的THE WIDTH，它只的是FIFO一次读写操作的数据位，就像MCU有8位和16位，ARM 32位等等，本程序实现8位的FIFO功能,三位格雷码可表示8位的深度。-THE WIDTH of THE FIFO: namely information in English often see THE WIDTH, it is only a FIFO data read and write operations, as has 8 bit or 16 bit M
FPGA-auto-car-and-arm
- VHDL Verilog编写，实现无线串口通信遥控4自由度机械臂和车身行动驱动。串口命令格式和舵机参数可根据实际需要自行调整-Verilog VHDL prepared to achieve a wireless serial communication remote control 4 degrees of freedom manipulator and body action. Serial command format and actuator parameters can be adju
ARM(Verilog-a-VHDL)
- 基于VHDL/Verilog实现的arm0,ARM5-7核-Based on VHDL/Verilog implementations arm0, ARM5-7 nuclear